Functions that Disable Interrupts
Certain Forth routines temporarily disable interrupts by setting the I bit in the condition code register. These routines are summarized here to assist you in planning the time-critical aspects of your application.
Uninterruptable memory operators
The kernel provides a library of uninterruptable memory operators that disable interrupts for a few microseconds during the memory access. These are very useful in applications where several tasks or interrupt routines must access a shared memory location. The glossary entries for these words detail the length of time that interrupts are disabled:
| CHANGE.BITS | IO.CLEAR.BITS | SMART.IO.F@ |
| CLEAR.BITS | IO.F@ | SMART.IO.X@ |
| FROM.IO | IO.SET.BITS | TOGGLE.BITS |
| FROM.SMART.IO | IO.SET.BITS | |2!| |
| IO.2@ | IO.X@ | |2@| |
| IO.@ | SET.BITS | |F!| |
| IO.C@ | SMART.IO.2@ | |F@| |
| IO.CHANGE.BITS | SMART.IO.@ | |X!| |
| IO.CLEAR.BITS | SMART.IO.C@ | |X@| |
Resource variables and mailbox management
The multitasker mediates access to shared resources and ensures smooth transfer of information among tasks. The routines that manage resource variables and mailboxes must disable interrupts for short periods to ensure proper access to shared resources and messages. Consequently, the following routines temporarily disable interrupts:
| ?GET | ?RECEIVE | ?SEND | GET | RECEIVE | RELEASE | SEND |
Multitasking words
The following routines temporarily disable interrupts to ensure that a new task is not corrupted while it is being built:
| BUILD.STANDARD.TASK | BUILD.TASK |
These routines disable interrupts to ensure that the elapsed time clock is not updated while it is being read:
| READ.ELAPSED.SECONDS | READ.ELAPSED.TIME |
The multitasker is charged with smoothly transferring control among tasks via timeslicing or cooperative task switching. The timeslicer is an interrupt service routine associated with the Real-Time Interrupt (RTI). It disables interrupts for most of the duration of a task switch which requires 3.6 microseconds plus 0.5 microseconds for each ASLEEP task encountered.
PAUSE
The cooperative task switch routine
PAUSE
switches tasks in (3.6 + 0.5n) microseconds, where n is the number of ASLEEP tasks encountered in the round robin task list. Interrupts are disabled during the task switch time.
Device drivers that call PAUSE
The PAUSE routine (which temporarily disables interrupts) is called by the following built-in device drivers:
| EMIT | KEY |
| EMIT1 | KEY1 |
| EMIT2 | KEY2 |
| IIC.RECEIVE | IIC.SEND |
| IIC.RECEIVE.FRAME | IIC.SEND.FRAME |
| IIC.SEND.NEXT.FRAME | WAIT.TIL.MATCH |
Device drivers
In addition to calling PAUSE, some device driver routines disable interrupts for short periods by invoking GET and RELEASE to manage resource variables. The following additional device drivers disable interrupts in this way:
| ?KEY | PAUSE.ON.KEY | SPI.RESTORE |
| ?KEY1 | READ.WATCH | SPI.SAVE |
| ?KEY2 | SET.WATCH |
EEPROM
All of the routines that write to the EEPROM disable interrupts for 30 msec per programmed 4-byte aligned EEPROM cell. This results from the processor’s design which prohibits any EEPROM locations from being read while other EEPROM locations are being modified. Since all interrupts are vectored through EEPROM, interrupts cannot be serviced while an EEPROM storage operation is in progress. The fundamental EEPROM storage functions are:
| (EEC!) | (EE!) | (EEX!) | (EEF!) | (EE2!) | TO.EEPROM |
These functions disable interrupts during EEPROM programming. The following routines may modify EEPROM locations:
| ATTACH | RESTORE.ALL |
| BAUD | SAVE.ALL |
| COLD.ON.RESET | SERIAL1.AT.STARTUP |
| DISABLE.BOOT.VECTORS | SERIAL2.AT.STARTUP |
| ENABLE.BOOT.VECTORS | STANDARD.RESET |
| IIC.INIT | START.TIMESLICER |
| INIT.VITAL.IRQS.ON.COLD | UNSAVE.ALL |
| INSTALL.MULTITASKER | WE.ALL |
| LOAD.PAGES.AT.STARTUP | WP.ALL |
| NO.AUTOSTART | WRITE.ENABLE |
| NO.STATUS.AT.STARTUP | WRITE.PROTECT |
| NO.VITAL.IRQ.INIT |
Flash writing words
All of the routines that write to the on-chip flash memory disable interrupts for 35 msec per programmed sector, where a sector is 512 bytes for a 256 KByte flash processor, or 1024 bytes for a 512 Kbyte processor. Routines that write to off-chip eXternal flash memory disable interrupts for 12 msec per programmed sector, where a standard sector is 256 bytes. The following flash routines disable interrupts:
| AUTOSTART: | PRIORITY.AUTOSTART: |
| CHECKSTART.DISABLE | SAVE.ALL |
| CHECKSTART.ENABLE | SET.BOOT.VECTOR |
| CLEAR.BOOT.VECTORS | STORE.PAGES |
| IS.AUTOSTART | TO.FLASH |
| IS.PRIORITY.AUTOSTART | TO.MEMORY |
| NO.AUTOSTART | TO.XFLASH |
Deliberately disabling interrupts
The following routines disable interrupts and do not re-enable them:
| COLD | SEI |
| DISABLE.INTERRUPTS | WARM |
DISABLE.INTERRUPTS and its assembly language counterpart SEI explicitly set the I bit in the condition code register. The routines ENABLE.INTERRUPTS and CLI clear the I bit to globally enable interrupts. The restart routines COLD and WARM disable interrupts so that the initialization process is not interrupted.
Note: Software development in Forth uses the Codeblocks-based Mosaic IDE Plus Integrated Development Environment; this is the same IDE used for software development in C. While Forth programmers will not use the IDE's GNU C (GCC) compiler, the IDE provides a full-featured text editor and customized terminal for rapid Forth code downloads and interactive Forth debugging sessions with the 9S12 (HCS12) processor on the controller board.