Chapter 12 - The Battery-Backed Real-Time Clock

The QED Board supports an optional battery-backed real-time clock. This "smart watch" and integrated battery are packaged with a 32K or 128K RAM in a sealed 32-pin DIP memory device. When this device is installed in the SRAM (center) memory socket on the QED Board, it simultaneously provides battery backed 32K or 128K RAM and a real-time calendar and watch that can be set and read by built-in QED-Forth words. Accuracy is better than +/- 1 minute per month and the watch is guaranteed to run for at least ten years. The watch correctly accounts for the differing numbers of days in each month, and handles leap years.

Built-in QED-Forth words make it easy to set and read the watch without worrying about the details of how data is exchanged. However, we do briefly discuss the operational details here to explain why interrupts are not allowed during watch data transfers.

To access the smart watch, the processor must execute 64 sequential write cycles, each of which contains a specified state for D0, the lowest-order data bit. After the correct receipt of the 64-bit pattern, the next 64 read or write cycles do not access the memory that is plugged into the socket; rather, they access the smart watch circuitry to set or read the time.

The QED Board's data and return stacks are maintained in the RAM chip that is packaged with the real-time clock. Thus, once the smart watch has been accessed, the stacks are not accessible for the next 64 read or write cycles. If an interrupt occurs during this time, the processor will not be successful when it tries to save the machine state on the return stack, and a crash will result. To prevent this situation, the routines that access the watch disable interrupts while the watch is in control (about 1 msec with an 8 MHz crystal or 0.5 msec with a 16 MHz crystal). This ensures that maskable interrupts will not cause a crash during a watch access. It is the programmer's responsibility to make sure that no non-maskable interrupts (e.g., /XIRQ) try to access the RAM while the watch is being set or read.

The words that access the watch use the top 16 bytes of the 68HC11F1's on-chip RAM (at addresses B3F0H-B3FFH) as a buffer to hold intermediate results during the data transfers. You may use these locations for other purposes when the watch is not being accessed.

The QED-Forth words SET.WATCH and READ.WATCH access the smart watch. Their use is straightforward. SET.WATCH writes specified time, day, and date information into the smart watch. It has the following stack picture:

For example, to set the watch to 3:55:30 PM on Wednesday, July 22, 1992, execute:

        DECIMAL        \ use decimal number base
        0            \ hundredths of seconds
        30            \ seconds after the minute
        55            \ minutes after the hour
        15            \ hour of the day
        4            \ day of the week (we're assuming Sunday is day 1)
        22            \ date in the month
        7            \ month
        92            \ year
        SET.WATCH

The watch is set and read using 24-hour time, where midnight is hour 0, noon is hour 12, and 11 PM is hour 23. Note that you may assign any day of the week as "day number 1".

The QED-Forth word READ.WATCH reports the current contents of the clock and calendar. Its stack picture is:

READ.WATCH    (  -- 100ths.sec\sec\min\hr\day\date\mo\yr )

For example, if we execute READ.WATCH exactly 10 seconds after we set the watch as specified above, we would see the following items on the stack:

0 \ 40 \ 55 \ 15 \ 4 \ 22 \ 7 \ 92

where 0 is the number of hundredths of a second, 40 is the number of seconds after the minute, 55 is the number of minutes after the hour, 15 is the hour, 4 is the day indicator, 22 is the date in the month, 7 is the month, and 92 is the year. Thus we conclude that it is 40 seconds past 15:55 (3:55 PM) on Wednesday, July 22, 1992.