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Table of Contents

Introduction

Connecting to the 24/7 Data Acquisition Module

Hardware

On-Board Reference

Digital Inputs

Analog Inputs

Programmable Gain

Input Protection

Allowable Input Impedance

Converter Noise and Effective Resolution

Other Sources of Noise and Offset Error

Tips For Measuring Small Voltages

Addressing the 24/7 WildCard Using Module Select Jumpers

Software

Initializing the 24/7 Data Acquisition Wildcard

Specifying the Reference Voltage

Starting a Conversion

Calibration Options
Choosing the Sample Rate
Setting the Gain
Choosing Bipolar or Unipolar Conversion
Specifying 16- or 24-bit Resolution
Synchronizing Conversions
Specifying the Source Channels

Obtaining A Sample

Single- and Multi-Channel Sampling

Continuous Sampling from a Single Channel
Sequential Sampling from Several Channels

C Example Listing (pdf)

Forth Example Listing (pdf)

Glossary

Appendix A:24/7 Data Acquisition Wildcard Pin-outs

Appendix B:24/7 Data Acquisition Wildcard Schematics (pdf)

24/7 Data Acquisition Wildcard Users Guide

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FORTH: Buffer_Off ( -- )
C: void Buffer_Off ( void )

Turns the buffered input off. This is the default state after power ups and resets.

FORTH: Buffer_On ( -- )
C: void Buffer_On ( void )

Allows high source impedances to be used at the analog field inputs by buffering the input signal through an amplifier. This results in a small DC offset voltage developed across the source impedance but not a gain error since the offset current is fixed at 1 nA. The offset voltage can be calculated using Equation 1. With the buffer on, the input voltage is also limited to the range 50 mV - 3.5 V.

FORTH: Init_AD24 ( b -- flag | b = Wildcard number )
C: int Init_AD24 ( char Wildcard_number )

Initializes the 24/7 Data Acquisition Wildcard by starting the timeslicer, turning on the SPI, disconnecting the analog field inputs from the analog to digital converter, and resetting the analog to digital converter. Returns a false flag if the Wildcard number is not valid. Valid Wildcards are MODULE0, MODULE1, MODULE2, MODULE3, MODULE4, MODULE5, MODULE6, and MODULE7. This routine does not change the SPI settings. The SPI settings are changed before each read or write operation to the analog to digital converter and then restored when the operation is complete. This Wildcard is fully compatible with any routine that uses the SPI as long as that routine gets (using GET) and releases (using RELEASE) the SPI resource variable properly.

FORTH: Read_Digital_IO ( -- nibble )
C: char Read_Digital_IO ( void )

Reads the 3 digital I/O lines on the 24/7 Data Acquisition Wildcard. The data is returned in the least significant nibble. The least significant bit of the returned byte indicates the status of the data ready line as shown in the following figure. The other three bits are uncommitted.

Bit 3Bit 2 Bit 1Bit 1
DIN-3 (Pin 3 of H2)DIN-2 (Pin 6 of H2)DIN-1 (Pin 5 of H2)\DRDY

FORTH: Read_FS_Cal ( -- ud | ud = fs cal value including error flag)
C: ulong Read_FS_Cal ( void )

Reads the full scale calibration information from the analog to digital converter for the current channel and settings. Start_Conversion must be called before attempting to read the full scale calibration information or invalid calibration information will be returned.

This routine checks the data ready line before reading the calibration coefficient. It checks the data ready line to make sure that a calibration is not occurring. If the converter is in the midst of a calibration sequence, this routine will wait up to 10 sample periods (the delay associated with a Full Self Calibration). If the data ready line does not return low within the delay time, it will return a timeout error (0x09) in the lower 8 bits of the returned 32-bit value, otherwise the lower 8 bits will be zero.

FORTH: Read_Zero_Cal ( -- ud | ud = zero cal value including error flag)
C: ulong Read_Zero_Cal ( void )

Reads the zero scale calibration information from the analog to digital converter for the current channel and settings. Start_Conversion must be called before attempting to read the zero calibration information or invalid calibration information will be returned.

This routine checks the data ready line before reading the calibration coefficient. It checks the data ready line to make sure that a calibration is not occurring. If the converter is in the midst of a calibration sequence, this routine will wait up to 10 sample periods (the delay associated with a Full Self Calibration). If the data ready line does not return low within the delay time, it will return a timeout error (0x09) in the lower 8 bits of the returned 32-bit value, otherwise the lower 8 bits will be zero.

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