Overview of Hardware and Software
A complete hardware/software development platform for real-time embedded systems

Congratulations on your choice of the PDQ Board™, a compact single board computer (SBC). This page introduces the software and hardware features of the PDQ Board: the RTOS (real time operating system), choice of programming languages, Freescale 9S12 microcontroller, memory, serial communications, real-time clock, and I/O (input/output). These features and capabilities make it a snap to design your instrument control projects.

In this chapter you’ll learn:

• All about the operating system and software features of the PDQ Board;
• All of the hardware features of your controller; and,
• How to configure various options on your controller.

To serve the needs of real-time control, modern embedded computers must have a set of complementary features including operating system software, device drivers, user interface, and expandable IO (input/output). You’ll find the PDQ Board has a set of hardware and software that work together to simplify your product development cycle while bringing new capability to your products.

The PDQ Board is a fast I/O-rich computer that dramatically cuts the cost of data acquisition and control. It packs 1 megabyte of memory, communications, dozens of analog and digital I/O lines, and dual expansion IO buses onto a compact low-cost board. This 2.5" x 4" single board computer is ideal for instrumentation, industrial control, automation, and data acquisition.

The PDQ Board hosts a fast Freescale HCS12 microprocessor. This controller has a 16-bit data bus and uses a Phase Locked Loop to synthesize a 40MHz internal clock and 20MHz bus clock, resulting in execution speeds 8 times faster than the 8-bit 68HC11 processor. more The processor’s native address space is only 64K, so a paging architecture is used to expand the addressable memory to 1 MByte. The address space is populated by 512K internal Flash, 14K internal RAM, 1K processor registers, 1K internal EEPROM, plus 496K of fast off-chip RAM. The off-chip RAM comprises 16K of “common” unpaged RAM that is available for data storage regardless of the page, and 480 Kbytes of paged RAM. The paged RAM is “shadowed” by external Flash that acts like an onboard disk drive, restoring your program code from Flash memory each time the board is powered up. This flexible memory architecture allows for both RAM- and Flash-intensive applications, and makes program development a snap.

The PDQ Board packs dozens of analog and digital I/O lines plus versatile serial communications links onto a compact board. moreIt delivers 8 digital I/O lines with counter/timer capabilities, 8 pulse width modulated (PWM) digital output signals, and 8 general purpose digital I/O lines. Additional I/O includes sixteen analog inputs with 10-bit resolution, dual RS232/485 ports with speeds to 115.2 KBaud, and synchronous SPI and I²C serial interfaces. Any of the digital I/O ports can be configured for general purpose I-O, and the analog input lines can be configured as digital inputs. An optional battery-backed real-time clock reports the time and date.

The PDQ Board is easily programmable in C, Forth or Assembly using any PC. Built-in programming tools include a multitasking executive and comprehensive device-driver libraries. All functions can be called interactively from the terminal to speed the debugging process. more In addition, the processor implements a “Background Debug Mode” (BDM) in hardware that facilitates real-time debugging. An available attachment to your desktop PC connects to the BDM port on the board, enabling you to set breakpoints, single step, and trace to diagnose your program at runtime. Convenient connectors allow for simple mechanical integration.

The PDQ Board can directly host up to 8 I/O expansion modules called Wildcards™ that you can mix and match depending on your application. The easy to use Wildcards stack onto the dual 24 pin Wildcard connectors on the PDQ Board. A convenient Docking Panel™ module includes an efficient switching power regulator, dual DB-9 serial connectors, a power jack and an on/off switch.

Wildcards implement a wide variety of user interface, communications, data acquisition and control capabilities. You can select the Wildcards that meet your needs to configure a cost-effective customized controller for your application. Available Wildcardsinclude embedded Ethernet or wireless control, GPS tracking, octal 12-bit D/A and 16-bit A/D converters, a 24-bit resolution analog data acquisition subsystem, Compact Flash card mass memory interface, fast buffered RS232/485 dual UART, high voltage/high current isolated I/O, and AC or DC solid state relays.

The following subsections discuss the interdependent hardware and software aspects of your controller.

You wouldn’t want to have to load an operating system into your desktop computer each time you turn it on, and the same holds true for embedded computers. Importantly, all of Mosaic’s controllers incorporate a full-time, on-board operating system called QED-Forth. QED-Forth is an interactive programmable macro language encompassing a real-time operating system (RTOS), object oriented graphical user interface (GUI) toolkit, debugging environment, an assembler and math library for use within the Forth programming language, and a comprehensive set of pre-coded device drivers.

These built-in functions make it easy for you to get the most out of your board's computational and I/O capabilities. You can fully program the PDQ Board using only the QED-Forth programming language, or you can program it using only the C language – the operating system’s functions are accessible using either language.

This user guide describes how to program your PDQ Board using the GNU C programming language, and how to use the built-in QED-Forth functions which are accessible from both Forth and C. C and Forth function glossaries provide an in-depth description of every routine. The PDQ Board’s extensive embedded firmware reduces your time time-to-market – we’ve precoded hundreds of useful routines so you won’t have to.

The RTOS in onboard Flash memory also manages all required hardware initializations and automatically starts your application code. It provides the run-time security feature of a watchdog (COP -- computer operating properly) timer.

Programming is a snap using the interactive debugger and multitasking executive. The multitasker allows conceptually different functions of your application to run independently in different tasks while accomplishing their duties in a timely fashion.

You can program the PDQ Board using either the ANSI-standard C language or Mosaic’s QED-Forth language. In either language, you can supplement your high-level code with assembly code. Using either language, you have full access to the firmware functions.

The GNU C Programming Environment

QED-Forth High Level Language

HCS12 Assembly Code

The following block diagram provides a cogent summary of the hardware capabilities of the PDQ Board. Each of the hardware modules shown is described in the following sections. In addition to the hardware shown, The PDQ Board directly hosts up to eight Wildcard I/O modules.

The PDQ Board requires a regulated +5 V supply and draws a maximum of 250 ma. It directly hosts up to eight Wildcards, each requiring a maximum of 100 ma. Some Wildcards require an additional +8-26 V supply. The PDQ Board optionally mounts on a Docking Panels which provides a 1 amp 5 volt switching power supply, dual DB-9 serial connectors, dual DB-25 IO connectors, a power jack, and a master power switch. The IO connectors, serial connectors, jack and switch are designed for easy mounting to an instrument panel.

The central block in Figure 1-1 represents the HCS12 microcontroller that provides the core capabilities of the PDQ Board. This chip integrates a central processing unit (CPU), communications, analog and digital I/O, PWM and timing capabilities, and memory. All of these capabilities are controlled by pre-coded device drivers built into the operating system on the PDQ Board. In this document we will refer to the microcontroller chip as the HCS12.

The processor includes:

• An 8 bit timer-controlled digital I/O port called PORTT. more The Enhanced Capture/Timer (ECT) subsystem in the HCS12 processor implements input capture (IC) channels that facilitate accurate measurement of pulse widths, output compare (OC) channels that make it easy to generate pulse trains and pulse-width modulated (PWM) waveforms, and pulse accumulators that count incoming pulses. These functions are backed up by interrupts that simplify real-time response to external events. This port can also be used for bitwise-programmable general- purpose digital inputs or outputs.
• An 8 bit Pulse-Width-Modulated (PWM) digital I/O port called PORTP. more Each PWM output can have software configurable period, duty cycle and polarity. The default resolution of the period and duty cycle is 8 bits, or pairs of PWM outputs can be combined to allow 16 bit timing resolution. The PWM outputs act without interrupting the processor, and so do not require processor intervention as each waveform period is created. This port can also be used for bitwise-programmable general-purpose digital inputs or outputs.
• An 8 bit general purpose digital I/O port called PORTM. Each bit of the port can be config-ured as either a digital input or output.
• Two 8 channel input ports (called PORTAD0 and PORTAD1) on the processor that can be configured to read either analog or digital inputs. Analog inputs are converted to 8-bit or 10-bit digital numbers by a built-in analog to digital (ATD) converter.
• Two built-in serial communications interface (SCI) ports that implement the RS232 or RS485 protocols. more Each SCI is an asynchronous interface, meaning that there is no clock transmitted with the data. Using the SCI ports, the PDQ Board can transmit and receive data at a default baud rate of 115200 baud, attaining software-programmable standard data rates from 300 baud to 115.2 Kbaud. Each SCI can be jumper-configured for communication via the RS232 or RS485 protocols.
• One additional available logic-level SCI port on two pins of PORTT. more The Enhanced Capture/Timer module may be used to implement a software serial port. Pins PT4 and PT5 may be configured as an additional logic-level port Serial3 merely by including a software UART library in your application. For information, see: Implementing Logic-Level Serial Ports.
• Three serial peripheral interface (SPI) channels capable of data transfer rates up to 5 megabits per second. more Many useful devices communicate via this synchronous (clocked) 3-wire serial in-terface. Multiple peripheral devices can communicate on this interface as long as each device has a unique chip select signal. The SPI0 channel is available on the Wildcard expansion bus header. The SPI1 and SPI2 channels on the HCS12 are brought out to a dedicated SPI header, and are reserved for inter-processor communications on multiprocessor systems such as the PDQ Screen. They may be used to communicate with other peripherals if multiprocessing is not required.
• An inter-IC (IIC or I²C) serial port capable of data transfer rates up to 100 kilobits per second. more Many peripheral chips communicate via this synchronous (clocked) 2-wire serial interface. Multiple peripheral devices can communicate on this interface as long as each device has a unique address which is transmitted by the bus master during the data transfer. If the I²C port is not needed, the two associated port pins can be configured as general purpose digital I/O, accessed as the upper two bits of PORTJ.
• A watchdog timer that can be configured to reset the processor if the application program fails to execute properly.
• A clock monitor available to reset the processor if the clock fails.
• External interrupt request pins and a variety of interrupt functions for quick response to real-time events.
• 1024 bytes of nonvolatile, Electrically Erasable PROM (EEPROM). more Of this, 640 bytes are used by the operating system and 384 bytes are available for your application. EEPROM provides a convenient way to store calibration constants and other information that must be periodically updated.
• A multiplexed 16-bit address/data bus. more While the HCS12’s native address space is 64 Kilo-bytes (equal to 65,536 bytes, and often written as 64K), 6 page bits are added to the address bus to expand the addressable memory to 1 Megabyte. The memory architecture is optimized for fast execution, and the onboard operating system makes page changing and memory access transparent to the user.

The PDQ Board uses a new version of the HCS12 microcontroller, called the MC9S12A512. Freescale’s HCS12 Core User Guide describes the programming registers, addressing modes, and assembly instructions of the HCS12, and illustrates the memory map of the processor. Freescale’s HCS12 Device Guide describes the processor’s hardware, including pin-outs and electrical characteristics. The Block User Guides describe the architecture and control registers for each of the processor’s I/O subsystems (A/D, PWM, ECT, I²C, SPI, etc.). All of these Freescale (formerly Motorola) documents are included as Adobe Acrobat Portable Document Format (*.pdf) files located here.

The PDQ Board includes a variety of convenient memory and storage for various applications, including sector-programmable Flash on the processor chip (“onchip Flash”), byte-programmable nonvolatile EEPROM, paged RAM backed up by an onboard Flash chip (“shadowed RAM”), and common RAM that is available regardless of the current page for variable storage, buffers and stacks. Part of the common RAM is on the processor chip (onchip RAM), and the rest is implemented by an external RAM chip on the board. You can also add up to one gigabyte of removable mass storage by adding a Compact Flash Wildcard module.

Flash memory is nonvolatile, so it retains its contents even when power is removed. Flash memory is also re-programmable, and the Flash programming functions are present in the PDQ Board’s onboard software library.

Code can also be compiled into paged RAM and saved to a “shadow” Flash device.

The PDQ Board includes 512K onchip Flash memory, 14K onchip RAM, 1K onchip EEPROM, and 496K off-chip RAM with Flash backup. Code can be located in the write-protectable Flash-backed RAM or the onchip Flash. Some memory is reserved for use by the Kernel (operating system), and the remaining memory is available for use by your application program.

See "Making Effective Use of Memory" for more details.

The PDQ Board provides a total of 44 I/O channels, distributed among counter/timer, PWM, digital I/O, analog input, and serial communications functions as shown in the following table. As shown in the table, many of the I/O lines can be software-configured to perform an alternate function. The “#” column shows the number of channels available for each function; a serial port is counted as a single channel even though it is implemented by multiple lines. The “Port Name” is the name of the primary hardware register associated with the I/O, and the “Header Labels” designate the pins on the PDQ Board’s I/O headers that bring out the specified I/O lines.

For each of these I/O lines, pre-coded I/O drivers make it easy to perform data acquisition, pulse width modulation, motor control, frequency measurement, data analysis, control, and communications. You may add lots of additional I/O using Wildcards.

Two RS232, RS485 serial ports, three fast synchronous serial peripheral interface (SPI) channels, an inter-IC (I²C) serial bus, and two additional logic-level serial ports provide plenty of communications capability. The HCS12 processor includes dual hardware UARTs, each with a single character buffer. Each of these UARTs drives RS232 or RS485 protocols at a default baud rate of 115.2 Kbaud. Standard baud rates from 300 baud to 115.2 Kbaud are attainable with good timing accuracy. Onboard serial interface chips generate the logic levels necessary to implement either the RS232 or RS485 protocols. Two serial ports allow you to program through one while your instrument can still communicate with a third party through the other.

The RS485 communications ports may be optionally terminated with resistor or RC networks. Pads are also included on the board for insertion of RS485 network bias resistors.

In addition, pins PT4–PT7 on the Digital I/O Connector may be used as one or two additional logic-level serial ports with speeds up to 19.2 Kbaud by including the Software UART library in your application. If you need more asynchronous serial ports, UART Wildcards plug directly into the PDQ Board’s Wildcard module bus, each Wildcard providing two more full-duplex RS232/422/485 buffered serial communication ports at up to 57.6 Kbaud.

The SPI0 (Serial Peripheral Interface channel 0) is a fast synchronous bi-directional serial link. When configured as an SPI bus master, the HCS12’s SPI links can clock data at up to 10 Megabaud; when configured as a slave, they can run at up to 5 Megabaud. The default speed of the SPI0 link after a restart is 2 Mbaud, and the three wires that comprise this link (MISO, MOSI, and SCK) are brought out on the Wildcard bus to facilitate communications with off-board I/O. The SPI0 channel also interfaces to the optional battery-backed Real-Time Clock on the controller board. Each device that is interfaced to the SPI0 link requires a unique chip select signal so that only one device at a time communicates with the processor. There are two additional SPI channels named SPI1 and SPI2 on the PDQ Board that are brought out to a dedicated 10-pin SPI header. On multi-processor systems they are reserved for inter-processor communications; otherwise, they may be used to communicate with peripheral devices.

The I²C (Inter-IC) bus is a clocked 2-wire bi-directional serial channel. Each device on the bus must have a unique 7-bit address that is included in the message packet to direct the communications to the correct device. If the I²C bus is not needed, the associated pins (PortJ pins 6 and 7) can be configured as general purpose digital I/O (but note that the signals are conditioned with pull-up and series resistors).

The hardware configuration and software control of the serial ports is discussed in detail in the Serial Communications chapter of this document.

A battery-backed real time clock (RTC) is also included on the controller board. Built-in software drivers make it easy to set and read the date and time of day. The onboard battery powers the RTC but does not battery-back the controller’s RAM.

Need even more I/O? The PDQ Board hosts Mosaic’s Wildcards™, small I/O modules for sophisticated and dedicated I/O. Up to 8 Wildcards can be stacked directly on the controller. Available Wildcards include:

• Wired Ethernet, or wireless 802.11b/g modules;
• Global positioning system GPS module;
• 16- or 24-bit resolution programmable gain A/D;
• 12-bit D/A;
• Compact Flash mass memory;
• Optically isolated AC or DC solid state relays;
• Configurable general-purpose digital I/O;
• Fast, buffered RS232, RS422 or RS485 communications interfaces; or,
• High-voltage, high-current DC inputs and outputs.
• Keypad and Display module with a 4 line by 20 character LCD display and a 20 button keypad;

See also →

• Getting to Know Your Hardware
• PDQ Board physical dimensions